# Verilog HDL Crash Course | Levels of Abstraction in Verilog | Module 01  ## About - Author: VLSI Excellence – Gyan Chand Dhaka - Title: Verilog HDL Crash Course | Levels of Abstraction in Verilog | Module 01 - Tags: #articles - URL: https://www.youtube.com/watch?v=7PmPt-w6j_w&list=PLbZHjPJZbJ9UgVvJLQl7iSsU5GO3yJ7J_&index=3 ## Highlights the structural type of code is always used to write the combinational circuit but the procedural code can write both sequential and combinational code - Note: structural - combinational only, procedural - both combinational and sequential --- to model any Boolean Expressions we have to use the assign statement so in data flow level modeling all or in registration transfer level modeling we have to use the assign statements - Note: Boolean logic requires an assign statement ---