# trench isolation Prevents current leakage between adjacent devices on an IC. Used on 250 nm CMOS and smaller. Older CMOS use [LOCOS](LOCOS.md). ## Process A trench is etched, then filled with an oxide of some form (e.g. silicon dioxide) before being planed flat.  ## Other Uses Threshold voltage can be decreased by the trench edge, meaning a narrower transistor width can be achieved. The subthreshold leakage current can cause issues here. [^1] --- # References [^1]: [Wikipedia](https://en.wikipedia.org/wiki/Shallow_trench_isolation)