2022-09-25 11:09 Status: # Transistor dimensions Determines the area, but also the current flow. Can determine the source and drain by how the current flows. if n implant on the left and p-implant on the right - n-channel transistor. The area where the n-p joins will be the source - heavily doped (form a diode - don't want so short the two together). ## Understanding: Thus the body of the substrate (connected to the p+) will be electrically connected to the n+, meaning n+ has to be at the lowest potential so we don't forward bias the other diode, so the source is at the lowest potential ([n-type](n-type.md) - source is always at lowest potential compared to the drain). Current flows from drain to source:  Flows in the length dimension - key dimension.   Top view - width  Source and drain area are important for capacitances. $A_D=W l_D$ $A_s=W l_s$  Perimeter of the drain is $P_D=2l_D+W$ Perimeter of the source is $P_S=2l_s$ since we don't count the perimeter next to the gate (up to debate) or the p-type. [^1] --- # References [^1]: [vr-4602-wk02-sc02-ruletypes](../../Spaces/University/ELEC4602%20–%20Microelectronics%20Design%20and%20Technology/Lectures/W2/vr-4602-wk02-sc02-ruletypes.mp4)