2022-10-26 16:37
Status:
# Sizing and Biasing Transistors
1. Power budget - $P = V_{DD}I_{tot}$ (class A circuit)
1. Large current in the input means good noise performance
2. Large current in 2nd stage: good drive, fast
3. small current in bias circuit since it doesn't directly process signals
2. Operating Region
1. Really low voltage - choose a low effective voltage (100mV-200mV) for voltage swings, at the cost of circuit speed
3. MOS Channel Lengths
1. $L\approxeq 2L_{min} -> 20L_{min}$
2. short L -> fast circuit ($f_T\propto 1/L^2$)
3. long L -> more accurate circuit (transistor matching $\propto L$)
4. Calculate W for one NMOS and one PMOS
1. Since $I_D \propto W$, scale the W to whatever $I_D$ you need!
5. W > $2W_{min}$ (don't use minimum dimensions!)
## Op Amp Circuit Example
$(\mu C_{OX})_n = 320\mu A/V^2$
$(\mu C_{OX})_p = -80\mu A/V^2$
and $I_{tot} = 128 \mu A$
Choices:
Choose all channel lengths $L=1\mu m$ (good gain since much longer than min and decent accuracy).
Then choose amount of current into the [differential pair](Differential%20Pair.md) and the how much in the common source. Same amount of current gives decent matching and decent speed.
Choose effective voltage as 0.2V for speed at the cost of output voltage swing.
Since the current factor for n is 4x current factor for p, the width of pmos should be 4x bigger (for the same current).
Thus the input MOS:
Be systematic for a decent layout. Do not create systematic offsets in the amplifier!
Example: W7 = 5um. Thus 32 micro amps flows in it naturally, and since this is not the 64 micro amps in M6, the output voltage will rise until M6 enters the triode region (no good gain in this mode!). Thus need to compensate with an offset at the input.
## Biasing
Not a very good idea to bias with a constant voltage as the current flowing is varying dramatically based on the threshold voltage.
Almost always use a current mirror output, where the input current is generated by a circuit that has the only function as generating a bias current (can assume this is available).
Scale the current mirror so we don't waste current flowing in the bias! And width should be scaled as well.
[^1]
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# References
[^1]: [vr-4602-wk05-sc04-opampsizebias](../../Spaces/University/ELEC4602%20–%20Microelectronics%20Design%20and%20Technology/Lectures/W5/vr-4602-wk05-sc04-opampsizebias.mp4)