2022-11-09 11:11 Tags: # Simple Gate Layout Static CMOS gates can always be laid out in a simple way. ## Basics - In [Static CMOS Logic Gates](Static%20CMOS%20Logic%20Gates.md) there are the same number of PMOS and NMOS, and every input goes to both a PMOS and an NMOS. ### Making a simple gate #### Assumptions - If we assume we can swap the order of the transistors (won't change function, will change speed) - All NFETs are of equal width and all PFETs are of equal width (tradeoff: can't optimise for speed, often this isn't necessary in a simple gate). #### Layout  Two active strips (one for PMOS, one for NMOS). Align the transistors with the same input in PMOS and NMOS below each other (poly goes across both active regions).  Attaching connections on metal 1:  Width of NMOS and PMOS can be changed independently of one another easily. Add: - N Well - P+ select - N+ select - Substrate Contact - Well contact - In/Out Ports (if making a library) ### Conventions Power supply running horizontally in metal 1 at the top of the layout and ground horizontal at the bottom of the layout. [^1] --- # References [^1]: [vr-4602-wk09-sc01-gatelayout](../../Spaces/University/ELEC4602%20–%20Microelectronics%20Design%20and%20Technology/Lectures/W9/vr-4602-wk09-sc01-gatelayout.mp4)