2022-10-30 10:37 Tags: # Sample Circuits Often sampled voltage needs to be distributed to a circuit without a high input impedance (insert buffer between sampling cap and where the sample is used). Not always efficient to insert a buffer since there is an offset error. ## Compensating the buffer offset error  During the sampling phase, the output voltage is at the offset voltage, meaning the amplifier needs a high slew rate as the output changes from near ground to whatever the input voltage is between every sample.  We can add a dummy switch at the high impedance node with the usual timing (inverted and slight delay from the sampling switch but before the input switch). ## Sampler with reduced jitter and distortion Timing jitter and distortion due to the charge injection's dependency on the input voltage can be reduced if the sampling switch always sees the same voltage. Two stage amplifier circuit. Differential amp then op amp:  Can't have two op amps cascaded together because the phase margin wouldn't be any good. When the clock is high (sampling phase) the output voltage is the same as the input voltage. When the clock is low and transistor goes open circuit, the output voltage would be the same because the voltage at the negative input couldn't change any more (virtual ground). The holding cap also serves as the compensation capacitor for the overall amplifying structure - don't need more caps! ## Advantage 1. Virtual ground on the input of the second amplifier means that no matter what the input voltage is, the voltage across the sampling switch is the same.  2. Thus clock jitter due to different effective voltages on the switch doesn't exist. 3. The speed of sampling is independent of input voltage 4. The charge injection is independent of input voltage Can remove offset due to charge injection by adding CH at the positive node of the second stage. If this value is matched to the sampling capacitor  Will still get an offset error due to the first stage. When the clock is low, you can configure the first stage in an offset compensated form.  [^1] --- # References [^1]: [vr-4602-wk06-sc04-samplecircs](../../Spaces/University/ELEC4602%20–%20Microelectronics%20Design%20and%20Technology/Lectures/W7/vr-4602-wk06-sc04-samplecircs.mp4)