2022-09-25 10:28 Status: # On-chip Components CMOS is usually used for microprocessor design so it is natural to use n and pmos. There are many more possibilities though. ## Diode ![](attachments/Pasted%20image%2020220925102909.png#invert) ![](attachments/Pasted%20image%2020220925102914.png#invert) If p- not connected to most negative voltage then we forward bias the PN junction in the transistor. ## BJT ![](attachments/Pasted%20image%2020220925103050.png#invert) Used in high speed applications. ![](attachments/Pasted%20image%2020220925103242.png#invert) n- well normally connected to most positive potential so PN junction to substrate is reverse biased. ![](attachments/Pasted%20image%2020220925103330.png#invert) Identify the PN junctions: ![](attachments/Pasted%20image%2020220925103411.png#invert) PNPN junction - [silicon controlled rectifier (SCR)](silicon%20controlled%20rectifier%20(SCR).md) Redraw circuit: ![](attachments/Pasted%20image%2020220925103509.png#invert) You can sustain the bottom transistor if a large enough transient switches on the bottom transistor, drawing current through the top transistor until the top base is turned on, then current flows through the bottom resistor and maintains the on state - a VDD-GND short! Called [latch-up](latch-up.md). Solution: Use very small Resistors ## Resistors ### Cheapest: n-well n+ need to be highly doped below the contact. Sheet resistivity - 2$k\Omega$/square - depends on length and width ![](attachments/Pasted%20image%2020220925103957.png#invert) Large resistance for area. ### 2. n+ region Extend the n+ region Use diffusion (no n-well) Higher conductivity - 2-20$k\Omega$/square. Needs a larger length to width ratio. ### 3. Poly resistance Both n-well and n+ are non-linear - becomes voltage dependent. Poly is not voltage dependent.![](attachments/Pasted%20image%2020220925105036.png#invert) 2-20$k\Omega$/square Can have a special lightly doped resistor depending on the process. ![](attachments/Pasted%20image%2020220925105133.png#invert) Probably the best poly resistors. 1$k\Omega$/square 1-10$M\Omega$ maximum value - very expensive. ## Capacitors Can make from any 2 conductors near each other. ### MOS Capacitor Use a big mosfet and bias it *so it is turned on*. ![](attachments/Pasted%20image%2020220925105346.png#invert) $8fF/\mu^2$ A bit fiddly to use. ### Interdigit Capacitor ![](attachments/Pasted%20image%2020220925105439.png#invert) Deep submicron - good, other tech - not good. ![](attachments/Pasted%20image%2020220925105525.png#invert) Top metal layers ![](attachments/Pasted%20image%2020220925105536.png#invert) Capacitance is proportional to area. $1-2fF/\mu^2$ Highly linear. C < 100pF (very large on a chip - expensive) ## Inductors Not alot of options - normally small, not magnetic. ### Spiral Very big. $1-10nH$ Used for RF Q~5-50. Need a thick layer of metal removed far from silicon to avoid eddy currents. [^1] --- # References [^1]: [vr-4602-wk01-sc10-components](../../Spaces/University/ELEC4602%20–%20Microelectronics%20Design%20and%20Technology/Lectures/W1/vr-4602-wk01-sc10-components.mp4)